###
#simulation tool is "iverilog and gtkwave"
#1.change the "source" name before simulate
#2.add dumpfile command in top module:
###############
#initial begin
#$dumpfile("test.vcd");
#$dumpvars(0,fb);  # "fb" is the dut name
#end
#end
#3."make run" to run the simulation and show waves 
###

ct = test
source = 3_febonacci.v

run: $(ct).lxt
	gtkwave $(ct).lxt
lxt: $(ct).vcd
	cp $(ct).vcd (ct).lxt

$(ct).lxt: $(ct).vcd
	cp $(ct).vcd $(ct).lxt
$(ct).vcd: $(ct).vvp	
	vvp -n $(ct).vvp -lxt2	
$(ct).vvp: $(source)
	iverilog -o $(ct).vvp $(source)

clean:
	rm -rf *.lxt *.vvp *.vcd

